Electromigration Modeling at Circuit Layout Level
Synopsis
Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels. Electromigration (EM) of interconnects has now become the dominant failure mechanism that determines the circuit reliability. This brief addresses the readers to the necessity of 3D real circuit modelling in order to evaluate the EM of interconnect system in ICs, and how they can create such models for their own applications. A 3-dimensional (3D) electro-thermo-structural model as opposed to the conventional current density based 2-dimensional (2D) models is presented at circuit-layout level.
- பதிப்புரிமை:
- 2012 Springer
Book Details
- Book Quality:
- ISBN-13:
- 9789814451215
- Publisher:
- Springer Singapore, Singapore
- Date of Addition:
- 2016-10-26T00:43:37Z
- மொழி:
- English
- Categories:
- Usage Restrictions:
- This is a copyrighted book.